US 12,456,617 B2
Semiconductor device pre-cleaning
Yi-Hsiang Chao, New Taipei (TW); Chih-Sheng Chou, Changhua County (TW); Shu-Ting Yang, Taipei (TW); Ting-Wei Weng, Hsinchu (TW); Peng-Hao Hsu, Hsinchu (TW); Chun-Hsien Huang, Hsinchu (TW); Hung-Hsu Chen, Tainan (TW); Hung-Chang Hsu, Kaohsiung (TW); Chih-Wei Chang, Hsinchu (TW); and Ming-Hsing Tsai, Hsin-Chu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on May 27, 2022, as Appl. No. 17/804,447.
Prior Publication US 2023/0386822 A1, Nov. 30, 2023
Int. Cl. H10K 71/40 (2023.01); H01L 21/02 (2006.01); H01L 21/285 (2006.01)
CPC H01L 21/02074 (2013.01) [H01L 21/28518 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method, comprising:
forming a protection layer on a dielectric capping layer, that is over a metal gate structure of a semiconductor device, and on a top surface of an epitaxial region adjacent to the metal gate structure;
performing a pre-clean operation to remove native oxides from the top surface of the epitaxial region,
wherein the protection layer is removed from the top surface of the epitaxial region during the pre-clean operation to expose the top surface of the epitaxial region to enable the native oxides to be removed from the top surface of the epitaxial region during the pre-clean operation, and
wherein a portion of the protection layer remains on the dielectric capping layer after the protection layer is completely removed from the top surface of the epitaxial region; and
forming a metal silicide layer on the top surface of the epitaxial region after the pre-clean operation.