US 12,456,500 B2
Control of dual-voltage memory operation
Russell Schreiber, Austin, TX (US)
Assigned to Advanced Micro Devices, Inc., Santa Clara, CA (US)
Filed by Advanced Micro Devices, Inc., Santa Clara, CA (US)
Filed on Mar. 17, 2020, as Appl. No. 16/820,828.
Claims priority of provisional application 62/879,885, filed on Jul. 29, 2019.
Prior Publication US 2021/0035614 A1, Feb. 4, 2021
Int. Cl. G11C 11/41 (2006.01); G11C 5/14 (2006.01); G11C 11/412 (2006.01); G11C 11/418 (2006.01); G11C 11/419 (2006.01)
CPC G11C 5/14 (2013.01) [G11C 11/412 (2013.01); G11C 11/418 (2013.01); G11C 11/419 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An integrated circuit comprising:
a memory having a memory array operating according to a memory power supply voltage and access circuitry coupled to said memory array operating according to a logic power supply voltage; and
a system management unit for activating a first control signal to selectively enable an assist feature of said memory selectively in response to a magnitude of a difference in voltage between said logic power supply voltage and said memory power supply voltage.