| CPC G10L 21/055 (2013.01) [H04B 17/364 (2015.01); H04L 65/80 (2013.01)] | 20 Claims |

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1. A device comprising:
a first memory;
an application processor (AP) coupled to the first memory;
a digital signal processor (DSP) coupled to the first memory; and
a speaker coupled to an output of the DSP;
wherein the AP executes instructions to:
determine first playback audio data comprising a first set of frames;
at a first time store the first set of frames in a buffer in the first memory;
determine one or more characteristics associated with operation of the buffer;
determine, based on the one or more characteristics, an estimated playback latency, wherein the estimated playback latency is indicative of an estimated delay in presentation of audio output; and
operate the device based at least in part on the estimated playback latency;
wherein the DSP executes instructions to:
determine second audio data comprising a second set of frames;
retrieve the first set of frames from the buffer at a second time;
generate output data by mixing the first set of frames and the second set of frames; and
send the output data to the speaker.
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