| CPC G09G 3/3266 (2013.01) [G09G 3/3291 (2013.01); G09G 2310/0286 (2013.01); G09G 2310/08 (2013.01); G09G 2330/021 (2013.01)] | 20 Claims |

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1. A gate driver, comprising:
a plurality of signal transfer circuits, wherein each of the plurality of signal transfer circuits is connected to a respective carry line to which a respective preceding signal transfer circuit is configured to apply a respective carry signal, to cause each of the plurality of signal transfer circuits to operate dependently of at least the respective preceding signal transfer circuit, and wherein each of the plurality of signal transfer circuits includes:
a first output circuit configured to receive the respective carry signal from the respective preceding signal transfer circuit and to output a carry signal and a first gate signal according to a voltage of a first-1 control node and a voltage of a first-2 control node;
a second output circuit configured to output a second gate signal according to a voltage of a second-1 control node and a voltage of a second-2 control node, in response to the second-1 control node being connected to the first-2 control node and the second-2 control node being connected to the first-1 control node; and
a third output circuit configured to output a third gate signal according to a voltage of a third-1 control node and a voltage of a third-2 control node, in response to the third-1 control node being connected to the first-2 control node and the third-2 control node being connected to the first-1 control node.
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