| CPC G09G 3/3233 (2013.01) [G09G 3/3266 (2013.01); H10K 59/131 (2023.02); G09G 2300/0819 (2013.01); G09G 2300/0852 (2013.01); G09G 2300/0861 (2013.01); G09G 2330/021 (2013.01)] | 20 Claims |
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1. A display apparatus comprising:
a substrate including a display area and a peripheral area adjacent to the display area;
a pixel in the display area;
a first conductive line extending in a first direction on a side of the peripheral area and to which a first gate voltage is applied;
a second conductive line extending in the first direction on the side of the peripheral area and to which a second gate voltage having a level lower than a level of the first gate voltage is applied;
a first clock signal line extending in the first direction on the side of the peripheral area and to which a first clock signal is applied;
a third conductive line extending in the first direction on the side of the peripheral area and to which a third gate voltage having a level different from the level of the first gate voltage is applied;
a fourth conductive line extending in the first direction on the side of the peripheral area and to which a fourth gate voltage having a level lower than the level of the third gate voltage is applied;
a second clock signal line extending in the first direction on the side of the peripheral area and to which a second clock signal is applied;
a first scan driving circuit arranged on the side of the peripheral area, electrically connected to the first conductive line, the second conductive line, and the first clock signal line, and transmitting a first scan signal to the pixel based on the first gate voltage, the second gate voltage, and the first clock signal; and
a second scan driving circuit arranged on the side of the peripheral area, electrically connected to the third conductive line, the fourth conductive line, and the second clock signal line, and transmitting a second scan signal to the pixel based on the third gate voltage, the fourth gate voltage, and the second clock signal.
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