US 12,456,042 B2
Neuromorphic computing device and method of operating the same
Youngnam Hwang, Hwaseong-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Apr. 11, 2022, as Appl. No. 17/717,339.
Claims priority of application No. 10-2021-0104555 (KR), filed on Aug. 9, 2021.
Prior Publication US 2023/0038384 A1, Feb. 9, 2023
Int. Cl. G06N 3/063 (2023.01); G11C 13/00 (2006.01)
CPC G06N 3/063 (2013.01) [G11C 13/0026 (2013.01); G11C 13/0028 (2013.01); G11C 13/004 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A neuromorphic computing device comprising:
a first memory cell array including a plurality of resistive memory cells that are connected to a plurality of wordlines, a plurality of bitlines and a plurality of source lines, and configured to store data and generate a plurality of read currents based on a plurality of input signals and the data;
a second memory cell array including a plurality of reference resistive memory cells that are connected to a plurality of reference wordlines, a plurality of reference bitlines and a plurality of reference source lines, and configured to generate a plurality of reference currents; and
an analog-to-digital converting circuit configured to convert the plurality of read currents into a plurality of digital signals based on the plurality of reference currents,
wherein,
the plurality of reference resistive memory cells are arranged in columns to form a plurality of reference columns, and the plurality of reference columns are configured to generate a plurality of column currents, and
one of the plurality of reference currents is generated by averaging at least two of the plurality of column currents.