US 12,455,996 B2
Remedial action in an integrated circuit in response to a monitor circuit diagnostic code sequence
Anatoly Gelman, San Diego, CA (US); Michael James Smith, Vancouver (CA); James Cheng-Huan Wu, Vancouver (CA); Olivier Alavoine, San Diego, CA (US); and Amit Aneja, Chandler, AZ (US)
Assigned to Qualcomm Incorporated, San Diego, CA (US)
Filed by QUALCOMM Incorporated, San Diego, CA (US)
Filed on Oct. 6, 2023, as Appl. No. 18/482,749.
Claims priority of provisional application 63/514,774, filed on Jul. 20, 2023.
Prior Publication US 2025/0028377 A1, Jan. 23, 2025
Int. Cl. G06F 30/343 (2020.01); G01R 31/3185 (2006.01); G06F 1/3228 (2019.01); G06F 1/3296 (2019.01); G06F 11/27 (2006.01); G06F 30/327 (2020.01); G06F 119/06 (2020.01); G06F 119/12 (2020.01)
CPC G06F 30/343 (2020.01) [G01R 31/318566 (2013.01); G06F 1/3228 (2013.01); G06F 1/3296 (2013.01); G06F 11/27 (2013.01); G06F 30/327 (2020.01); G06F 2119/06 (2020.01); G06F 2119/12 (2020.01)] 20 Claims
OG exemplary drawing
 
1. An apparatus comprising:
an integrated circuit having a logic path formed in the integrated circuit;
a monitor circuit formed in the integrated circuit near the logic path and configured to monitor a condition of the logic path and to generate a diagnostic code sequence to indicate the condition of the logic path over time;
a log to store the diagnostic code sequence; and
a monitor controller configured to receive diagnostic codes of the diagnostic code sequence, to store the diagnostic codes in the log with a corresponding time stamp, to determine a condition of the integrated circuit based on the diagnostic code sequence that is stored in the log, and to initiate a remedial action in response to the condition of the integrated circuit.