| CPC G06F 21/572 (2013.01) [G06F 8/654 (2018.02); G06F 12/1408 (2013.01); G06F 2212/1052 (2013.01); G06F 2212/2022 (2013.01); G06F 2221/033 (2013.01)] | 18 Claims |

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1. A data storage device comprising:
a first non-volatile memory;
a second non-volatile memory; and
a processor configured to communicate with the first and second non-volatile memories and further configured to:
receive, from a host, a firmware download command and a firmware update;
divide the firmware update into a number of portions, wherein the number of portions depends on a size and/or a layout of the second non-volatile memory;
determine whether there is available free memory space in the second non-volatile memory to store the portions of the firmware update; and
in response to determining that there is available free memory space in the second non-volatile memory to store the portions of the firmware update:
determine addresses in the second non-volatile memory to store the portions of the firmware update, wherein the addresses are determined on-the-fly as opposed to being predetermined;
store the portions of the firmware update in the addresses in the second non-volatile memory; and
store an encrypted version of an address of a first portion of the firmware update in a configuration file;
wherein the portions of the firmware update are stored in a linked fashion such that an address of a given portion of the firmware update is stored in a previous portion of the firmware update.
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