US 12,455,842 B2
Cross address-space bridging
Idan Burstein, Akko (IL); Dotan David Levi, Kiryat Motzkin (IL); Ariel Shahar, Jerusalem (IL); Lior Narkis, Petah-Tikva (IL); Igor Voks, Zichron Yaakov (IL); Noam Bloch, Bat Shlomo (IL); and Shay Aisman, Zichron Yaakov (IL)
Assigned to Mellanox Technologies, Ltd, Yokneam (IL)
Filed by Mellanox Technologies, Ltd., Yokneam (IL)
Filed on Feb. 19, 2024, as Appl. No. 18/444,804.
Application 18/444,804 is a continuation of application No. 17/189,303, filed on Mar. 2, 2021, granted, now 11,940,933.
Prior Publication US 2024/0193106 A1, Jun. 13, 2024
Int. Cl. G06F 13/16 (2006.01); G06F 9/455 (2018.01); G06F 9/46 (2006.01); G06F 12/1045 (2016.01); G06F 13/38 (2006.01); G06F 13/42 (2006.01); G06F 15/173 (2006.01)
CPC G06F 13/1668 (2013.01) [G06F 9/45558 (2013.01); G06F 9/466 (2013.01); G06F 12/1054 (2013.01); G06F 12/1063 (2013.01); G06F 13/387 (2013.01); G06F 13/4221 (2013.01); G06F 15/17331 (2013.01); G06F 2009/45579 (2013.01)] 16 Claims
OG exemplary drawing
 
1. A computing system, comprising:
at least one peripheral bus;
first and second system components, which are (i) connected to a peripheral device via the at least one peripheral bus and (ii) assigned respective first and second different address spaces in a memory; and
the peripheral device, which is connected to the at least one peripheral bus and is to execute a command that processes multiple received packets by scattering headers and payloads of the packets to addresses in the memory, or prepares multiple packets for transmission by gathering headers and payloads of the packets from addresses in the memory, the addresses comprising both (i) one or more first addresses, belonging to the first address space of the first system component and designated to store the payloads, and (ii) one or more second addresses, belonging to the second address space of the second system component and designated to store the headers.