US 12,455,815 B2
Memory state recovery method for no-MMU environment in emulated CPU chip acceleration
Zhiying Jiang, Jiangsu (CN); Fei Wang, Jiangsu (CN); and Dongrui Fan, Jiangsu (CN)
Assigned to Suzhou Ricore IC Technologies Ltd., Jiangsu (CN)
Appl. No. 18/696,556
Filed by Suzhou Ricore IC Technologies Ltd., Jiangsu (CN)
PCT Filed Aug. 11, 2022, PCT No. PCT/CN2022/111684
§ 371(c)(1), (2) Date Mar. 28, 2024,
PCT Pub. No. WO2023/206859, PCT Pub. Date Nov. 2, 2023.
Claims priority of application No. 202210435456.5 (CN), filed on Apr. 24, 2022.
Prior Publication US 2024/0385956 A1, Nov. 21, 2024
Int. Cl. G06F 12/02 (2006.01)
CPC G06F 12/023 (2013.01) 8 Claims
OG exemplary drawing
 
1. A memory state recovery method for an MMU-free environment in an acceleration of CPU chip simulation, comprising following steps:
Step S1: relocating Virtual Memory Areas (VMA), including: relocating each VMA in an available physical memory space, and converting a base address represented by a virtual address of the VMA into a physical address, wherein a length of the VMA remains unchanged;
Step S2: recovering memory access data, wherein a recovery rule of a storage location for each read memory access record from the recovered memory access data is: the base address of the relocated VMA+offset;
Step S3: recovering stack states, wherein a recovery rule of a storage location for each stack frame is: the base address of the relocated VMA+offset; and
Step S4: recovering general register values.