US 12,455,799 B2
Explicit lockstep for functional safety
Henry Stracovsky, Austin, TX (US); Nir Maor, San Diego, CA (US); Antonio Priore, Cambridge (GB); Vikas Kumar Sinha, Austin, TX (US); Paul Kitchin, Austin, TX (US); and Sunil Oak, Sugar Land, TX (US)
Assigned to QUALCOMM Incorporated, San Diego, CA (US)
Filed by QUALCOMM Incorporated, San Diego, CA (US)
Filed on Oct. 25, 2023, as Appl. No. 18/494,565.
Claims priority of provisional application 63/508,752, filed on Jun. 16, 2023.
Prior Publication US 2024/0419451 A1, Dec. 19, 2024
Int. Cl. G06F 11/16 (2006.01); G06F 9/38 (2018.01)
CPC G06F 11/1629 (2013.01) [G06F 9/3861 (2013.01); G06F 11/1641 (2013.01); G06F 9/3851 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A method of explicit lockstep for functional safety, the method comprising:
spawning, by a main thread, a first safe thread and a second safe thread;
initializing and mapping a first data register associated with the first safe thread to each safe variable of a set of predetermined safe variables;
allocating, by the main thread, a first physical memory page and a first address space mapped to the first data register associated with the first safe thread;
initializing and mapping a second data register associated with the second safe thread to each safe variable of the set of predetermined safe variables;
allocating, by the main thread, a second physical memory page and a second address space mapped to the second data register associated with the second safe thread;
comparing, by a hardware comparator, a first safe variable value in the first data register to a second safe variable value in the second register; and
issuing an error completion to the first safe thread and the second safe thread when the hardware comparator detects a mismatch between the first data register and the second data register.