| CPC G06F 9/4881 (2013.01) [G06F 9/546 (2013.01)] | 20 Claims | 

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               1. A computing system comprising: 
            a computational engine having a plurality of processing elements arrayed in accordance with a grid topology, wherein each of the plurality of processing elements is configured to perform one of a plurality of processing functions, and wherein the plurality of processing functions include a principal function, a kernel function, a routing function, and a reducer function; and 
                a host processor having at least one processing circuit and at least one memory that stores operational instructions that, when executed by the at least one processing circuit, cause the at least one processing circuit to: 
                receive a task input; and 
                  control the computational engine in accordance with an iterative reduce-broadcast-apply process to generate a task output that is based on the task input; 
                wherein the iterative reduce-broadcast-apply process includes a produce operation, a reduce operation, a broadcast operation and an apply operation; 
                wherein the task input and task output correspond to a quadratic unconstrained binary optimization over a binary vector v=(v1, v2, . . . vn); and 
                wherein n of the plurality of processing elements performing corresponding kernel functions each store a current value of vj, where j=1 . . . n. 
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