US 12,455,747 B1
Programmable stacked processor with simultaneous execution of all program steps over a data stream
Mark Ashley Mathews, Melbourne, FL (US)
Filed by Mark Ashley Mathews, Melbourne, FL (US)
Filed on May 16, 2025, as Appl. No. 19/210,515.
Application 19/210,515 is a continuation of application No. 19/190,418, filed on Apr. 25, 2025.
Int. Cl. G06F 9/38 (2018.01); G06F 9/30 (2018.01); G06F 13/28 (2006.01)
CPC G06F 9/3889 (2013.01) [G06F 9/30058 (2013.01); G06F 13/28 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A computing machine, comprising:
a plurality of slice processing units (SPUs) coupled in a specific order from a first SPU to a last SPU, each SPU having a plurality of data registers, an instruction word register, and an Arithmetic Logic Unit (ALU);
an input data stream interface coupled to the first SPU, configured to receive input values and to pass the input values to the first SPU in the specific order of SPUs; and
an output data stream interface coupled to the last SPU, configured to receive output values from the last SPU in the specific order of SPUs
wherein instruction words are preprogrammed into the instruction word registers of the SPUs, simultaneous processing in each SPU is controlled by decoding the instruction words into control signals for various function blocks including the ALU, and all data register values are passed forward after processing in each active cycle.