US 12,455,744 B2
To-be-executed instruction prediction method and system
Bing Han, Beijing (CN); Yongyu Chen, Dongguan (CN); Nan Li, Beijing (CN); and Taixu Tian, Dongguan (CN)
Assigned to Huawei Technologies Co., Ltd, Shenzhen (CN)
Filed by HUAWEI TECHNOLOGIES CO., LTD., Shenzhen (CN)
Filed on May 9, 2023, as Appl. No. 18/314,655.
Claims priority of application No. 202210504984.1 (CN), filed on May 10, 2022; and application No. 202210866647.7 (CN), filed on Jul. 22, 2022.
Prior Publication US 2023/0367596 A1, Nov. 16, 2023
Int. Cl. G06F 9/30 (2018.01); G06F 9/32 (2018.01); G06F 9/38 (2018.01)
CPC G06F 9/30058 (2013.01) [G06F 9/323 (2023.08); G06F 9/3844 (2013.01); G06F 9/3848 (2013.01)] 16 Claims
OG exemplary drawing
 
1. A method comprising:
obtaining, by a processor, a plurality of to-be-executed first instruction blocks (IBs), wherein each first IB comprises at least one instruction to be sequentially executed, and the at least one instruction of each first IB comprises one branch instruction;
searching, based on the branch instructions comprised in the plurality of first IBs, at least one candidate execution path for a candidate execution path corresponding to the plurality of first IBs, wherein each of the at least one candidate execution paths indicates a jump relationship between a plurality of second IBs, and a jump relationship indicated by the candidate execution path corresponding to the plurality of first IBs comprises a jump relationship between the plurality of first IBs;
predicting, based on the jump relationship between the plurality of first IBs, a next instruction corresponding to the branch instruction comprised in each of the plurality of first IBs; and
determining, by the processor, based on the candidate execution path corresponding to the plurality of first IBs not being found in the at least one candidate execution path, that the jump relationship between the plurality of first IBs is a reference jump relationship; and
predicting, based on the reference jump relationship, the next instruction corresponding to the branch instruction comprised in each of the plurality of first IBs, wherein the determining, by the processor, that the jump relationship between the plurality of first IBs is a reference jump relationship comprises:
adding, by the processor, a target instruction between the plurality of first IBs, wherein the target instruction indicates that the jump relation-ship between the plurality of first IBs is the reference jump relationship.