US 12,455,584 B2
Low-dropout regulator
Hung-Yi Hsieh, Hsinchu (TW)
Assigned to MEDIATEK INC., Hsinchu (TW)
Filed by MEDIATEK INC., Hsinchu (TW)
Filed on Apr. 24, 2023, as Appl. No. 18/305,495.
Claims priority of provisional application 63/350,915, filed on Jun. 10, 2022.
Prior Publication US 2023/0400871 A1, Dec. 14, 2023
Int. Cl. G05F 1/59 (2006.01); G05F 1/563 (2006.01)
CPC G05F 1/59 (2013.01) [G05F 1/563 (2013.01)] 14 Claims
OG exemplary drawing
 
1. A low-dropout regulator, comprising:
an analog low-dropout regulating circuit; and
a digital low-dropout regulating circuit, assisting the analog low-dropout regulating circuit;
wherein:
the digital low-dropout regulating circuit is coupled to the analog low-dropout regulating circuit, and the digital low-dropout regulating circuit senses operating information that shows if the analog low-dropout regulating circuit is within its operating region;
the digital low-dropout regulating circuit assists the analog low-dropout regulating circuit based on the operating information of the analog low-dropout regulating circuit instead of an output voltage at an output terminal of the low-dropout regulator;
the analog low-dropout regulating circuit has a capacitor array providing an adaptive capacitance between a voltage source and a gate terminal of a power MOS of the analog low-dropout regulating circuit; and
the greater a current that the digital low-dropout regulating circuit provides to a load coupled to the output terminal of the low-dropout regulator, the smaller the capacitance that the capacitor array provides between the voltage source and the gate terminal of the power MOS.