US 12,127,455 B2
Display substrate, display panel and display apparatus
Ling Shi, Beijing (CN); Yipeng Chen, Beijing (CN); Xuewei Tian, Beijing (CN); Ke Liu, Beijing (CN); Dan Guo, Beijing (CN); and Zhenhua Zhang, Beijing (CN)
Assigned to Chengdu BOE Optoelectronics Technology Co., Ltd., Beijing (CN); and BOE Technology Group Co., Ltd., Beijing (CN)
Filed by Chengdu BOE Optoelectronics Technology Co., Ltd., Chengdu (CN); and BOE Technology Group Co., Ltd., Beijing (CN)
Filed on Jul. 18, 2023, as Appl. No. 18/354,028.
Application 18/354,028 is a continuation of application No. 17/612,274, granted, now 11,770,953, previously published as PCT/CN2021/075839, filed on Feb. 7, 2021.
Prior Publication US 2023/0363222 A1, Nov. 9, 2023
Int. Cl. H10K 59/131 (2023.01); G09G 3/3241 (2016.01); H01L 27/12 (2006.01); H10K 59/121 (2023.01); H10K 59/122 (2023.01); H10K 59/35 (2023.01); H10K 59/65 (2023.01)
CPC H10K 59/131 (2023.02) [G09G 3/3241 (2013.01); H10K 59/1216 (2023.02); H10K 59/122 (2023.02); H10K 59/65 (2023.02); G09G 2300/0465 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0842 (2013.01); G09G 2360/14 (2013.01); H01L 27/124 (2013.01); H10K 59/1213 (2023.02); H10K 59/35 (2023.02)] 16 Claims
OG exemplary drawing
 
1. A display substrate, comprising:
a base substrate; and
a plurality of sub-pixels disposed on the base substrate, wherein each sub-pixel comprises a pixel driving circuit, and the pixel driving circuit comprises a writing transistor, a compensation transistor, a first reset transistor, and a storage capacitor,
wherein the display substrate comprises a semiconductor layer, a first conductive layer and a second conductive layer disposed in sequence on the base substrate, wherein a gate of the writing transistor, a gate of the compensation transistor, and a gate of the first reset transistor are located in the first conductive layer and are implemented as a continuous integral structure; an active layer of the writing transistor, an active layer of the compensation transistor and an active layer of the first reset transistor are located in the semiconductor layer; a first storage capacitor electrode of the storage capacitor is located in the first conductive layer, and a second storage capacitor electrode of the storage capacitor is located in the second conductive layer.