CPC H10B 43/10 (2023.02) [H10B 43/27 (2023.02)] | 20 Claims |
1. A semiconductor storage device comprising:
a first stacked body in which a plurality of electrically conductive layers and a plurality of first insulating layers are stacked alternately one by one, the first stacked body including a plurality of pillar bodies that penetrate the plurality of electrically conductive layers and the plurality of first insulating layers in a stacking direction of the plurality of electrically conductive layers, wherein memory cells are formed in portions of the pillar bodies that are opposed to at least one of the plurality of electrically conductive layers;
a plurality of plate-shaped portions that extend in a first direction intersecting the stacking direction and divide the first stacked body into a plurality of blocks, the plurality of plate-shaped portions including a first insulating material; and
a wall portion including a second insulating material and including a first portion and a second portion, the first portion and the second portion respectively extending in a second direction intersecting the first direction and the stacking direction and being arranged in the stacking direction, the second portion including an outer edge connected to a side surface of the first portion extending in the second direction and the stacking direction, and inclined with respect to the stacking direction at an angle larger than an angle defined by the side surface and the stacking direction.
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