US 12,126,358 B2
Two-level error correcting code with sharing of check-bits
Shih-Lien Linus Lu, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Jul. 28, 2022, as Appl. No. 17/815,624.
Application 17/815,624 is a continuation of application No. 16/925,361, filed on Jul. 10, 2020, granted, now 11,438,015.
Prior Publication US 2022/0368354 A1, Nov. 17, 2022
Int. Cl. H03M 13/11 (2006.01); G11C 29/42 (2006.01); G11C 29/44 (2006.01); H03M 13/15 (2006.01); H03M 13/29 (2006.01)
CPC H03M 13/1148 (2013.01) [G11C 29/42 (2013.01); G11C 29/44 (2013.01); H03M 13/1174 (2013.01); H03M 13/1575 (2013.01); H03M 13/29 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of operating a memory controller including:
a first level error correction code (ECC) circuit for generating a first level ECC;
a second level ECC circuit for generating a second level ECC;
the memory controller coupled to a memory device for sharing check bits among the first level ECC and the second level ECC, the method comprising:
generating a first level parity-check matrix associated with a first error detection scheme in the first level ECC;
transforming the first level parity-check matrix to a systematic form of the first level parity-check matrix;
generating a second level parity-check matrix associated with a first error correction scheme in the second level ECC;
transforming the second level parity-check matrix to a systematic form of the second level parity-check matrix;
identifying rows of the systematic form of the second level parity-check matrix that can be derived from the systematic form of the first level parity-check matrix, comprising sorting columns of the systematic form of the second level parity-check matrix to find a maximum of N rows with matching and aligned zeros; and
storing, in the memory device, check bits associated with all rows of the systematic form of the first level parity-check matrix and rows of the systematic form of the second level parity-check matrix that cannot be derived from the systematic form of the first level parity-check matrix.