US 12,125,922 B2
Nanosheet field-effect transistor device and method of forming
Sai-Hooi Yeong, Zhubei (TW); Bo-Feng Young, Taipei (TW); Chien Ning Yao, Hsinchu (TW); and Chi On Chui, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Jul. 24, 2023, as Appl. No. 18/357,491.
Application 18/357,491 is a continuation of application No. 17/574,844, filed on Jan. 13, 2022, granted, now 11,791,421.
Application 17/574,844 is a continuation of application No. 16/882,965, filed on May 26, 2020, granted, now 11,227,956, issued on Jan. 18, 2022.
Claims priority of provisional application 62/955,154, filed on Dec. 30, 2019.
Prior Publication US 2023/0369512 A1, Nov. 16, 2023
Int. Cl. H01L 29/786 (2006.01); H01L 29/08 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01)
CPC H01L 29/78696 (2013.01) [H01L 29/0847 (2013.01); H01L 29/42392 (2013.01); H01L 29/66545 (2013.01); H01L 29/66795 (2013.01); H01L 29/7851 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a fin protruding above a substrate;
source/drain regions over the fin;
nanosheets between the source/drain regions;
inner spacers between end portions of the nanosheets;
a material layer between the inner spacers and the source/drain regions;
air gaps between the inner spaces and the material layer, wherein each air gap is disposed laterally between an inner spacer and the material layer, wherein each air gap comprises an upper portion and a lower portion that is separated from the upper portion; and
a gate structure over the fin and between the source/drain regions.