CPC H01L 29/785 (2013.01) [H01L 21/3081 (2013.01); H01L 21/3086 (2013.01); H01L 21/76816 (2013.01); H01L 21/76877 (2013.01); H01L 29/66795 (2013.01)] | 20 Claims |
1. A semiconductor device structure, comprising:
a contact over a source/drain region of a fin structure;
a gate stack over a channel region of the fin structure;
a first mask layer covering the gate stack; and
a second mask layer covering the contact, wherein a side surface of the first mask layer is in direct contact with a side surface of the second mask layer, and the first mask layer includes a portion directly below the second mask layer, wherein a top surface of the first mask layer and a top surface of the second mask layer are substantially leveled.
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