US 12,125,911 B2
Method of modulating stress of dielectric layers
Chung-Ting Ko, Kaohsiung (TW); Han-Chi Lin, Kaohsiung (TW); Chunyao Wang, Zhubei (TW); Ching Yu Huang, Hsinchu (TW); Tze-Liang Lee, Hsinchu (TW); and Yung-Chih Wang, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD, Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Aug. 9, 2022, as Appl. No. 17/818,595.
Application 17/818,595 is a continuation of application No. 16/933,622, filed on Jul. 20, 2020, granted, now 11,502,196.
Application 16/933,622 is a continuation of application No. 16/057,243, filed on Aug. 7, 2018, granted, now 10,720,526, issued on Jul. 21, 2020.
Claims priority of provisional application 62/691,942, filed on Jun. 29, 2018.
Prior Publication US 2022/0384649 A1, Dec. 1, 2022
Int. Cl. H01L 29/78 (2006.01); H01L 21/02 (2006.01); H01L 21/3065 (2006.01); H01L 21/3115 (2006.01); H01L 21/3213 (2006.01); H01L 21/762 (2006.01); H01L 21/8234 (2006.01); H01L 27/088 (2006.01); H01L 29/66 (2006.01)
CPC H01L 29/7843 (2013.01) [H01L 21/0217 (2013.01); H01L 21/02208 (2013.01); H01L 21/0228 (2013.01); H01L 21/0234 (2013.01); H01L 21/3065 (2013.01); H01L 21/31155 (2013.01); H01L 21/32133 (2013.01); H01L 21/76224 (2013.01); H01L 21/823431 (2013.01); H01L 21/823437 (2013.01); H01L 21/823481 (2013.01); H01L 27/0886 (2013.01); H01L 29/66545 (2013.01); H01L 29/66795 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
etching a dummy gate stack to reveal a protruding semiconductor fin protruding higher than isolation regions, wherein the isolation regions are over a bulk semiconductor substrate;
etching the protruding semiconductor fin;
removing portions of semiconductor materials underlying the protruding semiconductor fin to form an opening, wherein the removing is performed using the isolation regions as parts of an etching mask, and the opening extends into the bulk semiconductor substrate; and
in a process chamber, depositing a silicon nitride layer using Atomic Layer Deposition (ALD) to fill the opening, wherein the ALD comprises a plurality of ALD cycles, each comprising:
introducing a silicon-containing precursor into the process chamber;
purging the silicon-containing precursor from the process chamber;
introducing hydrogen radicals into the process chamber;
purging the hydrogen radicals from the process chamber;
introducing a nitrogen-containing precursor into the process chamber; and
purging the nitrogen-containing precursor from the process chamber.