| CPC H01L 29/0665 (2013.01) [H01L 21/823418 (2013.01); H01L 29/0653 (2013.01); H01L 29/42392 (2013.01); H01L 29/66545 (2013.01); H01L 29/78696 (2013.01)] | 20 Claims |
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1. A method of forming a semiconductor device, the method comprising:
forming a fin structure protruding above a substrate, wherein the fin structure comprises a fin and a layer stack overlying the fin, wherein the layer stack comprises alternating layers of a first semiconductor material and a second semiconductor material;
forming a gate structure over the fin structure;
forming openings in the fin structure on opposing sides of the gate structure, wherein the openings extend through the layer stack into the fin;
forming a dielectric layer in bottoms of the openings, comprising:
lining sidewalls of the openings and the bottoms of the openings with a dielectric material;
performing an implantation process to treat the dielectric material; and
after performing the implantation process, performing an etching process to remove first portions of the dielectric material disposed along the sidewalls of the openings, wherein after the etching process, second portions of the dielectric material at the bottoms of the openings remain to form the dielectric layer; and
forming source/drain regions in the openings on the dielectric layer, wherein the source/drain regions are separated from the fin by the dielectric layer.
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