US 12,125,848 B2
Semiconductor device structure incorporating air gap
Chih-Ching Wang, Kinmen (TW); Chun-Chung Su, New Taipei (TW); Chung-Wei Wu, Hsinchu (TW); Jon-Hsu Ho, New Taipei (TW); Kuan-Lun Cheng, Hsinchu (TW); Wen-Hsing Hsieh, Hsinchu (TW); Wen-Yuan Chen, Taoyuan (TW); and Zhi-Qiang Wu, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed on Apr. 10, 2023, as Appl. No. 18/132,924.
Application 18/132,924 is a division of application No. 17/377,796, filed on Jul. 16, 2021, granted, now 11,626,400.
Prior Publication US 2023/0246026 A1, Aug. 3, 2023
Int. Cl. H01L 27/088 (2006.01); H01L 21/764 (2006.01); H01L 21/8234 (2006.01); H01L 29/06 (2006.01); H01L 29/08 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 29/786 (2006.01)
CPC H01L 27/088 (2013.01) [H01L 21/764 (2013.01); H01L 29/0649 (2013.01); H01L 29/0847 (2013.01); H01L 29/42392 (2013.01); H01L 29/6653 (2013.01); H01L 29/66553 (2013.01); H01L 29/66742 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device structure, comprising:
a dielectric layer;
a first source/drain feature in contact with the dielectric layer, wherein the first source/drain feature comprises a first sidewall;
a second source/drain feature in contact with the dielectric layer and adjacent to the first source/drain feature, wherein the second source/drain feature comprises a second sidewall;
an insulating layer disposed over the dielectric layer and between the first sidewall and the second sidewall, wherein the insulating layer comprises a first surface facing the first sidewall, a second surface facing the second sidewall, a third surface connecting the first surface and the second surface, and a fourth surface opposite the third surface;
a sealing material disposed between the first sidewall and the first surface, wherein the sealing material, the first sidewall, the first surface, and the dielectric layer are exposed to an air gap.