US 12,125,835 B2
Module package with high illumination efficiency
Chee-Pin T'Ng, Penang (MY); and Sai-Mun Lee, Penang (MY)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Dec. 19, 2022, as Appl. No. 18/083,619.
Application 18/083,619 is a continuation of application No. 17/155,258, filed on Jan. 22, 2021, granted, now 11,562,992.
Application 17/155,258 is a continuation of application No. 16/235,118, filed on Dec. 28, 2018, granted, now 10,937,773.
Application 16/235,118 is a continuation of application No. 14/453,199, filed on Aug. 6, 2014, granted, now 10,211,191.
Prior Publication US 2023/0120755 A1, Apr. 20, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 25/16 (2023.01); G01J 1/02 (2006.01); G01J 3/02 (2006.01); G01J 3/10 (2006.01); G01S 7/481 (2006.01); G01S 17/04 (2020.01); H01L 25/00 (2006.01)
CPC H01L 25/167 (2013.01) [G01J 1/0214 (2013.01); G01J 3/0227 (2013.01); G01J 3/0256 (2013.01); G01J 3/0262 (2013.01); G01J 3/108 (2013.01); G01S 7/4813 (2013.01); G01S 17/04 (2020.01); H01L 25/50 (2013.01); H01L 2924/0002 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A module package, comprising:
a circuit board having an upper surface;
a photo sensor chip attached to the upper surface of the circuit board;
a light emitting die attached to the upper surface of the circuit board;
a first transparent layer covering the photo sensor chip and a part of the upper surface of the circuit board, wherein the first transparent layer has a receptacle opposite to the photo sensor chip;
a second transparent layer covering the light emitting die and another part of the upper surface of the circuit board;
an opaque layer covering the first transparent layer and having a through hole opposite to the receptacle; and
a filter accommodated in the receptacle, and secured by transparent adhesive in the receptacle of the first transparent layer.