US 12,125,810 B2
Delamination sensor
Chih-Hsuan Tai, Hsinchu (TW); Ming-Chung Wu, Hsinchu (TW); Kuo-Wen Chen, Hsinchu (TW); and Hsiang-Tai Lu, Hsinchu County (TW)
Assigned to TAIWAN SEMICONDUTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Mar. 27, 2023, as Appl. No. 18/190,361.
Application 18/190,361 is a continuation of application No. 17/365,699, filed on Jul. 1, 2021, granted, now 11,616,029.
Claims priority of provisional application 63/192,187, filed on May 24, 2021.
Prior Publication US 2023/0238340 A1, Jul. 27, 2023
Int. Cl. H01L 23/58 (2006.01); H01L 23/498 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01)
CPC H01L 23/585 (2013.01) [H01L 23/49816 (2013.01); H01L 23/5226 (2013.01); H01L 23/528 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor structure, comprising:
a substrate comprising a plurality of first contact pads;
an interconnect structure comprising:
a plurality of metallization layers disposed in an extreme low-k (ELK) dielectric layer, each of the metallization layers comprising contact vias and metal lines, and
a plurality of second contact pads; and
a first delamination sensor comprising a first connecting structure sandwiched between one of the first contact pads and one of the second contact pads,
wherein a vertical projection area of the first connecting structure in the plurality of metallization layers comprises a first via empty region where no contact vias are present in a plurality of consecutive layers in the plurality of metallization layers.