| CPC H01L 23/5384 (2013.01) [H01L 21/486 (2013.01); H01L 21/76802 (2013.01); H01L 21/7682 (2013.01); H01L 23/5329 (2013.01); H01L 23/5386 (2013.01)] | 20 Claims |
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1. An integrated chip comprising:
a substrate;
a first conductive wire over the substrate;
a second conductive wire over the substrate and laterally spaced from the first conductive wire;
an etch-stop layer on a conductive sidewall of the first conductive wire and a conductive sidewall of the second conductive wire;
a first dielectric cap laterally between the first conductive wire and the second conductive wire, wherein the first dielectric cap laterally separates the first conductive wire from the second conductive wire, and wherein the first dielectric cap comprises a first dielectric material, wherein a bottom surface of the first dielectric cap delimits a first cavity that is laterally between the first conductive wire and the second conductive wire; and
a first residual capping structure over the second conductive wire, wherein a bottom surface of the first residual capping structure extends along a top surface of the second conductive wire, beyond the conductive sidewall of the second conductive wire, and directly over the etch-stop layer.
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