US 12,125,783 B2
Interconnect structure and method for forming the same
Chung-Liang Cheng, Changhua County (TW); Shih Wei Bih, Taichung (TW); and Yen-Yu Chen, Taichung (TW)
Assigned to Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu (TW)
Filed on Apr. 12, 2023, as Appl. No. 18/133,970.
Application 17/156,292 is a division of application No. 16/058,290, filed on Aug. 8, 2018, granted, now 10,923,416.
Application 18/133,970 is a continuation of application No. 17/156,292, filed on Jan. 22, 2021, granted, now 11,664,308.
Claims priority of provisional application 62/552,256, filed on Aug. 30, 2017.
Prior Publication US 2023/0253309 A1, Aug. 10, 2023
Int. Cl. H01L 23/522 (2006.01); H01L 21/3105 (2006.01); H01L 21/311 (2006.01); H01L 21/768 (2006.01); H01L 21/02 (2006.01)
CPC H01L 23/5226 (2013.01) [H01L 21/3105 (2013.01); H01L 21/31105 (2013.01); H01L 21/76802 (2013.01); H01L 21/76831 (2013.01); H01L 21/02164 (2013.01); H01L 21/02252 (2013.01); H01L 21/31116 (2013.01); H01L 21/76843 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of making a semiconductor device, comprising:
forming one or more isolation layers on a substrate;
forming a first conductive structure extending vertically through the one or more isolation layers, the first conductive structure having sidewalls and a bottom surface;
forming an insulation layer along the sidewalls of the one or more isolation layers; and
forming a barrier layer along sidewalls of the insulation layer such that the insulation layer is disposed between the barrier layer and the sidewalls of the one or more isolation layers,
wherein the barrier layer comprises a work function metal, wherein the first conductive structure is electrically coupled to a second conductive structure through at least the bottom surface, and wherein the insulation layer provides an interface oxygen to work function metal ratio of below 0.8.