US 12,125,782 B2
Semiconductor structure and method of forming the same
Chih-Kuang Kao, Hsin-Chu County (TW); Ta-Chih Peng, Hsinchu (TW); Ming-Hong Kao, Hsinchu (TW); and Huei-Wen Yang, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu (TW)
Filed on Feb. 17, 2023, as Appl. No. 18/171,311.
Application 18/171,311 is a division of application No. 17/116,926, filed on Dec. 9, 2020, granted, now 11,587,863.
Application 17/116,926 is a division of application No. 16/186,096, filed on Nov. 9, 2018, granted, now 10,867,903, issued on Dec. 15, 2020.
Claims priority of provisional application 62/711,033, filed on Jul. 27, 2018.
Prior Publication US 2023/0207450 A1, Jun. 29, 2023
Int. Cl. H01L 23/48 (2006.01); H01L 21/02 (2006.01); H01L 23/00 (2006.01); H01L 23/52 (2006.01); H01L 23/522 (2006.01); H01L 25/065 (2023.01); H01L 49/02 (2006.01)
CPC H01L 23/5223 (2013.01) [H01L 21/02532 (2013.01); H01L 21/0254 (2013.01); H01L 21/02554 (2013.01); H01L 24/17 (2013.01); H01L 25/0657 (2013.01); H01L 28/60 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of forming a semiconductor structure, comprising:
providing an interconnect structure with a conductive trace;
forming a capacitor over the interconnect structure;
forming a first dielectric surrounding the capacitor;
forming a first conductor and a second conductor penetrating through the first dielectric and a portion of the capacitor and electrically connected with the capacitor and the conductive trace; and
performing an electrical measurement of the capacitor through the first conductor and the second conductor.