US 12,125,755 B2
Chip package structure with cavity in interposer
Shin-Puu Jeng, Hsinchu (TW); Feng-Cheng Hsu, New Taipei (TW); and Shuo-Mao Chen, New Taipei (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD, Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Jul. 27, 2023, as Appl. No. 18/359,923.
Application 17/814,874 is a division of application No. 16/984,382, filed on Aug. 4, 2020, granted, now 11,443,993, issued on Sep. 13, 2022.
Application 18/359,923 is a continuation of application No. 17/814,874, filed on Jul. 26, 2022, granted, now 11,810,830.
Claims priority of provisional application 62/897,460, filed on Sep. 9, 2019.
Prior Publication US 2023/0369150 A1, Nov. 16, 2023
Int. Cl. H01L 23/13 (2006.01); H01L 23/00 (2006.01); H01L 23/498 (2006.01); H01L 23/538 (2006.01); H01L 25/00 (2006.01); H01L 25/18 (2023.01)
CPC H01L 23/13 (2013.01) [H01L 23/49833 (2013.01); H01L 23/5384 (2013.01); H01L 23/5385 (2013.01); H01L 24/16 (2013.01); H01L 24/17 (2013.01); H01L 25/50 (2013.01); H01L 25/18 (2013.01); H01L 2224/16148 (2013.01); H01L 2224/16238 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A package structure, comprising:
a package substrate;
an interposer substrate disposed over the package substrate, wherein the interposer substrate has a bottom surface facing the package substrate and a first cavity formed on the bottom surface; and
a semiconductor device disposed in the first cavity, wherein the semiconductor device is disposed on a bottom surface of the first cavity, and the bottom surface of the first cavity is spaced apart from a top surface of the interposer substrate opposite the bottom surface of the interposer substrate;
wherein the package substrate has a top surface facing the interposer substrate and a second cavity formed on the top surface, wherein the second cavity is configured to accommodate the semiconductor device.