US 12,125,751 B2
Method and structure for FinFET isolation
Che-Cheng Chang, New Taipei (TW); Chih-Han Lin, Hsinchu (TW); and Jr-Jung Lin, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Jan. 20, 2023, as Appl. No. 18/157,352.
Application 15/345,125 is a division of application No. 14/579,728, filed on Dec. 22, 2014, granted, now 9,490,176, issued on Nov. 8, 2016.
Application 18/157,352 is a continuation of application No. 17/120,942, filed on Dec. 14, 2020, granted, now 11,605,564.
Application 17/120,942 is a continuation of application No. 16/725,227, filed on Dec. 23, 2019, granted, now 10,867,865, issued on Dec. 15, 2020.
Application 16/725,227 is a continuation of application No. 16/222,837, filed on Dec. 17, 2018, granted, now 10,522,414, issued on Dec. 31, 2019.
Application 16/222,837 is a continuation of application No. 15/810,616, filed on Nov. 13, 2017, granted, now 10,163,722, issued on Dec. 25, 2018.
Application 15/810,616 is a continuation of application No. 15/345,125, filed on Nov. 7, 2016, granted, now 9,818,649, issued on Nov. 14, 2017.
Claims priority of provisional application 62/065,125, filed on Oct. 17, 2014.
Prior Publication US 2023/0154800 A1, May 18, 2023
Int. Cl. H01L 23/00 (2006.01); H01L 21/8234 (2006.01); H01L 27/088 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01)
CPC H01L 21/823481 (2013.01) [H01L 21/823431 (2013.01); H01L 21/823468 (2013.01); H01L 27/0886 (2013.01); H01L 29/66545 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a substrate;
a fin protruding from the substrate, the fin having a first end and a second end;
a gate stack over the substrate and engaging the fin;
a dielectric layer abutting the first end of the fin; and
spacer features disposed on sidewalls of the gate stack and on a top surface of the dielectric layer.