US 12,125,525 B2
Memory device and method of operating the same
Tsung-Hsien Huang, Hsinchu (TW); Wei-jer Hsieh, Hsinchu (TW); Tsung-Yuan Huang, Hsinchu (TW); and Yu-Hao Hsu, Tainan (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Feb. 11, 2022, as Appl. No. 17/669,673.
Claims priority of provisional application 63/230,620, filed on Aug. 6, 2021.
Prior Publication US 2023/0041094 A1, Feb. 9, 2023
Int. Cl. G11C 11/418 (2006.01)
CPC G11C 11/418 (2013.01) 20 Claims
OG exemplary drawing
 
1. A memory device, comprising:
a word line driver connected to a word line;
a row of memory cells connected to the word line, each memory cell powered by a first supply voltage; and
a power circuit configured to provide:
the first supply voltage to the word line driver when a read condition is satisfied; and
a second supply voltage to the word line driver when the read condition is not satisfied, wherein the second supply voltage is less than the first supply voltage,
wherein the power circuit includes a plurality of transistors connected between a first power line having the first supply voltage and a second power line having the second supply voltage.