CPC G06F 9/30036 (2013.01) [G06F 9/3856 (2023.08)] | 25 Claims |
1. A coprocessor that processes coprocessor instructions and that is coupled to a processor that executes instructions, the coprocessor instructions including a first committed coprocessor instruction, received from the processor, the coprocessor comprising:
a vector register file comprising a plurality of vector registers;
an extended vector register file comprising a plurality of extended registers in which the extended registers extend the data width of the vector registers of the vector register file;
a coprocessor issue unit for receiving the first committed coprocessor instruction, and issuing the first committed coprocessor instruction; and
a coprocessor execution queue coupled to the coprocessor issue unit to receive the first committed coprocessor instruction from the coprocessor issue unit and dispatch the first committed coprocessor instruction to a coprocessor functional unit.
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