US 11,800,823 B2
Method for manufacturing thermal dispersion layer in programmable metallization cell
Fa-Shen Jiang, Taoyuan (TW); and Hsing-Lien Lin, Hsin-Chu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu (TW)
Filed on Feb. 2, 2021, as Appl. No. 17/165,088.
Application 17/165,088 is a division of application No. 16/114,607, filed on Aug. 28, 2018, granted, now 10,916,697.
Claims priority of provisional application 62/692,354, filed on Jun. 29, 2018.
Prior Publication US 2021/0159404 A1, May 27, 2021
Int. Cl. H10N 70/20 (2023.01); G11C 13/00 (2006.01); H10N 70/00 (2023.01)
CPC H10N 70/245 (2023.02) [G11C 13/0011 (2013.01); H10N 70/063 (2023.02); H10N 70/8265 (2023.02); H10N 70/841 (2023.02); H10N 70/8613 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A method for manufacturing a memory device, comprising:
forming a bottom electrode over a substrate;
forming a heat dispersion layer over the bottom electrode, wherein a bottommost surface of the heat dispersion layer is above a bottom surface of the bottom electrode;
forming a dielectric layer over the heat dispersion layer;
forming a top electrode over the dielectric layer; and
wherein the heat dispersion layer comprises a first dielectric material.