US 11,800,102 B2
Low-latency video coding methods and apparatuses for chroma separated tree
Chia-Ming Tsai, Hsinchu (TW); Chun-Chia Chen, Hsinchu (TW); Chih-Wei Hsu, Hsinchu (TW); Ching-Yeh Chen, Hsinchu (TW); Tzu-Der Chuang, Hsinchu (TW); and Yu-Wen Huang, Hsinchu (TW)
Assigned to MEDIATEK INC., Hsinchu (TW)
Filed by MEDIATEK INC., Hsinchu (TW)
Filed on Dec. 16, 2021, as Appl. No. 17/552,963.
Claims priority of provisional application 63/237,557, filed on Aug. 27, 2021.
Prior Publication US 2023/0065083 A1, Mar. 2, 2023
Int. Cl. H04N 19/119 (2014.01); H04N 19/105 (2014.01); H04N 19/176 (2014.01); H04N 19/186 (2014.01); H04N 19/169 (2014.01); H04N 19/159 (2014.01)
CPC H04N 19/119 (2014.11) [H04N 19/105 (2014.11); H04N 19/159 (2014.11); H04N 19/176 (2014.11); H04N 19/186 (2014.11); H04N 19/1883 (2014.11)] 18 Claims
OG exemplary drawing
 
1. A low-latency video coding method in a video encoding or decoding system, comprising:
receiving input data associated with a current Intra slice, wherein the current Intra slice is composed of a plurality of Coding Tree Units (CTUs) for encoding or decoding, and each CTU consists of a luminance (luma) Coding Tree Block (CTB) and one or more chrominance (chroma) CTBs;
partitioning each luma CTB into a plurality of non-overlapping luma pipeline units and partitioning each chroma CTB into a plurality of non-overlapping chroma pipeline units, wherein each of the luma and chroma pipeline units is processed by one pipeline stage after another pipeline stage in the video encoding or decoding system, and different pipeline stages process different pipeline units simultaneously; and
encoding or decoding the CTUs in the current Intra slice by performing processing of the chroma pipeline units after beginning processing of the corresponding luma pipeline units in at least one pipeline stage, wherein one luma pipeline unit and at least one previous chroma pipeline unit are simultaneously processed by the pipeline stage within one pipeline unit time interval,
wherein a first luma pipeline unit of a first CTU in the current Intra slice is processed by the pipeline stage in a first pipeline unit time interval and a first chroma pipeline unit of the first CTU in the current Intra slice is processed by the pipeline stage in a predefined pipeline unit time interval, wherein the predefined pipeline unit time interval is N pipeline unit time intervals delayed from the first pipeline unit time interval, wherein N is an integer greater than or equal to 1,
wherein N is 1, the predefined pipeline unit time interval is a second pipeline unit time interval, each luma CTB is partitioned into four luma pipeline units, and each chroma CTB is partitioned into four chroma pipeline units, wherein the first chroma pipeline unit of the first CTU is processed simultaneously by the pipeline stage with a second luma pipeline unit of the first CTU in the second pipeline unit time interval, a second chroma pipeline unit of the first CTU is processed simultaneously by the pipeline stage with a third luma pipeline unit of the first CTU in a third pipeline unit time interval, a third chroma pipeline unit of the first CTU is processed simultaneously by the pipeline stage with a last luma pipeline unit of the first CTU in a fourth pipeline unit time interval, and a last chroma pipeline unit of the first CTU is processed simultaneously by the pipeline stage with a first luma pipeline unit of a second CTU in the current Intra slice in a fifth pipeline unit time interval.