| US 11,799,673 B2 | ||
| Hardness amplification of physical unclonable functions (PUFS) | ||
| Fatemeh Ganji, Gainesville, FL (US); Shahin Tajik, Gainesville, FL (US); Jean-Pierre Seifert, Werder Havel (DE); Domenic Forte, Gainesville, FL (US); and Mark M. Tehranipoor, Gainesville, FL (US) | ||
| Assigned to UNIVERSITY OF FLORIDA RESEARCH FOUNDATION, INCORPORATED, Gainesville, FL (US)TECHNISCHE UNIVERSITAET BERLIN, Berlin (DE) | ||
| Filed by University of Florida Research Foundation, Incorporated, Gainesville, FL (US) | ||
| Filed on Apr. 7, 2020, as Appl. No. 16/841,873. | ||
| Claims priority of provisional application 62/836,829, filed on Apr. 22, 2019. | ||
| Prior Publication US 2023/0179434 A1, Jun. 8, 2023 | ||
| Int. Cl. H04L 9/00 (2022.01); H04L 9/32 (2006.01); H04L 9/08 (2006.01); H03K 19/173 (2006.01); H03K 19/096 (2006.01); H03K 19/17748 (2020.01) | ||
| CPC H04L 9/3278 (2013.01) [H03K 19/0963 (2013.01); H03K 19/1737 (2013.01); H03K 19/17748 (2013.01); H04L 9/002 (2013.01); H04L 9/0866 (2013.01); H04L 9/3271 (2013.01)] | 19 Claims |
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1. A combined physical unclonable function (PUF) comprising:
a plurality of PUFs, each PUF comprising a plurality of stages and an arbiter configured to generate a single PUF response based on response portions generated by the plurality of stages; and one or more logic gates, the one or more logic gates configured to combine the single PUF response for each of the plurality of PUFs in accordance with a combination function, wherein a number of the plurality of PUFs is determined based on a desired level of security for the combined PUF and the number of the plurality of PUFs for the desired level of security is determined based on a low degree algorithm approximation of the security of the combined PUF. |