US 11,799,030 B2
Semiconductor devices with embedded ferroelectric field effect transistors
Chia-Hao Chang, Hsinchu (TW); Lin-Yu Huang, Hsinchu (TW); Han-Jong Chia, Hsinchu (TW); Bo-Feng Young, Taipei (TW); and Yu-Ming Lin, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Jul. 7, 2022, as Appl. No. 17/811,212.
Application 17/811,212 is a division of application No. 16/939,909, filed on Jul. 27, 2020, granted, now 11,404,570.
Claims priority of provisional application 62/982,375, filed on Feb. 27, 2020.
Prior Publication US 2022/0352380 A1, Nov. 3, 2022
Int. Cl. H01L 29/78 (2006.01); H01L 29/40 (2006.01); H01L 21/28 (2006.01); H01L 29/51 (2006.01)
CPC H01L 29/78391 (2014.09) [H01L 29/40111 (2019.08); H01L 29/516 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A device, comprising:
a substrate;
gate stacks and source/drain (S/D) features over the substrate;
S/D contacts over the S/D features;
one or more dielectric layers over the gate stacks and the S/D contacts;
a via penetrating the one or more dielectric layers and electrically contacting one of the gate stacks and the S/D contacts, wherein the via is above the one of the gate stacks and S/D contacts; and
a ferroelectric (FE) stack over the via and directly contacting the via, wherein the FE stack includes an FE feature and a top electrode over the FE feature.