US 11,799,016 B2
Fabrication of electronic devices using sacrificial seed layers
Michael Everett Babb, Bryan, TX (US); and Harlan Rusty Harris, College Station, TX (US)
Assigned to The Texas A&M University System, College Station, TX (US)
Filed by The Texas A&M University System, College Station, TX (US)
Filed on Mar. 31, 2022, as Appl. No. 17/710,092.
Application 17/710,092 is a continuation of application No. 16/968,294, granted, now 11,302,800, previously published as PCT/US2019/019039, filed on Feb. 21, 2019.
Claims priority of provisional application 62/634,677, filed on Feb. 23, 2018.
Prior Publication US 2022/0223719 A1, Jul. 14, 2022
Int. Cl. H01L 29/66 (2006.01); H01L 21/02 (2006.01)
CPC H01L 29/66757 (2013.01) [H01L 21/02488 (2013.01); H01L 21/02532 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a substrate layer;
a first amorphous layer deposited on the substrate layer;
a semiconductor layer deposited on the first amorphous layer, wherein the semiconductor layer does not contact the substrate layer;
a channel formed into the semiconductor layer and into the first amorphous layer;
a second amorphous layer deposited in the channel; and
a semiconductor defect region disposed between the substrate layer and the second amorphous layer.