US 11,798,943 B2
Transistor source/drain contacts and methods of forming the same
Yang-Cheng Wu, Hsinchu (TW); Yun-Hua Chen, Zhubei (TW); Wen-Kuo Hsieh, Taipei (TW); and Huan-Just Lin, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Jun. 4, 2021, as Appl. No. 17/339,452.
Claims priority of provisional application 63/150,745, filed on Feb. 18, 2021.
Prior Publication US 2022/0262792 A1, Aug. 18, 2022
Int. Cl. H01L 21/768 (2006.01); H01L 27/088 (2006.01); H01L 29/08 (2006.01); H01L 29/78 (2006.01); H01L 21/306 (2006.01); H01L 21/8234 (2006.01); H01L 29/66 (2006.01)
CPC H01L 27/0886 (2013.01) [H01L 21/30608 (2013.01); H01L 21/823418 (2013.01); H01L 21/823431 (2013.01); H01L 29/0843 (2013.01); H01L 29/66795 (2013.01); H01L 29/7851 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
depositing a protective layer on a source/drain region and a gate mask, the gate mask disposed on a gate structure, the gate structure disposed on a channel region of a substrate, the channel region adjoining the source/drain region;
etching an opening through the protective layer, the opening exposing the source/drain region;
depositing a metal in the opening and on the protective layer;
annealing the metal to form a metal-semiconductor alloy region on the source/drain region; and
removing residue of the metal from the opening with a cleaning process, the protective layer covering the gate mask during the cleaning process.