US 11,798,849 B2
Semiconductor device with fin end spacer plug and method of manufacturing the same
Tzu-Chung Wang, Hsinchu (TW); and Tung Ying Lee, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed on Feb. 3, 2022, as Appl. No. 17/591,906.
Application 17/591,906 is a division of application No. 16/535,975, filed on Aug. 8, 2019, granted, now 11,244,867, issued on Feb. 8, 2022.
Claims priority of provisional application 62/738,347, filed on Sep. 28, 2018.
Prior Publication US 2022/0157665 A1, May 19, 2022
Int. Cl. H01L 21/8234 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 27/088 (2006.01)
CPC H01L 21/823468 (2013.01) [H01L 21/823418 (2013.01); H01L 21/823431 (2013.01); H01L 21/823481 (2013.01); H01L 27/0886 (2013.01); H01L 29/6681 (2013.01); H01L 29/785 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a first fin and a second fin, both extending in a first direction;
a fin end spacer extending in a second direction crossing the first direction and disposed between ends of the first and second fins;
gate electrodes disposed over the first and second fins, respectively; and
a dummy gate electrode over the fin end spacer,
wherein a width of the fin end spacer is greater than a width of the dummy gate electrode, wherein a space between the ends of the first fin and the second fin is greater than the width of the dummy gate electrode and smaller than the width of the fin end spacer, and wherein the dummy gate electrode does not overlap the first fin and the second fin.