US 11,798,809 B2
Semiconductor device and method of manufacturing
Meng-Han Lin, Hsinchu (TW); Sai-Hooi Yeong, Zhubei (TW); and Chi On Chui, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Aug. 9, 2021, as Appl. No. 17/397,632.
Claims priority of provisional application 63/211,750, filed on Jun. 17, 2021.
Prior Publication US 2022/0406606 A1, Dec. 22, 2022
Int. Cl. H01L 21/28 (2006.01); H01L 27/088 (2006.01); H01L 21/8234 (2006.01); H01L 29/423 (2006.01)
CPC H01L 21/28185 (2013.01) [H01L 21/823456 (2013.01); H01L 21/823462 (2013.01); H01L 27/088 (2013.01); H01L 29/42376 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of manufacturing a semiconductor device, the method comprising:
depositing a first dielectric layer over a logic region and an analog region of a semiconductor substrate;
treating the first dielectric layer to form a recovered layer and a non-treated layer, the non-treated layer being located between the recovered layer and the semiconductor substrate;
after the treating the first dielectric layer, removing a first portion of the recovered layer from the logic region while the non-treated layer is present;
forming a second dielectric layer in the logic region; and
depositing a gate electrode material over a remainder of the recovered layer and the second dielectric layer.