US 11,798,628 B2
Semiconductor memory apparatus adopting new ISPP method with sacrificial programming pulse and programming method thereof
Masaru Yano, Kanagawa (JP); and Toshiaki Takeshita, Kanagawa (JP)
Assigned to Winbond Electronics Corp., Taichung (TW)
Filed by Winbond Electronics Corp., Taichung (TW)
Filed on Aug. 31, 2021, as Appl. No. 17/462,006.
Claims priority of application No. 2020-145274 (JP), filed on Aug. 31, 2020.
Prior Publication US 2022/0068393 A1, Mar. 3, 2022
Int. Cl. G11C 16/04 (2006.01); G11C 16/10 (2006.01); G11C 16/34 (2006.01)
CPC G11C 16/10 (2013.01) [G11C 16/0483 (2013.01); G11C 16/349 (2013.01); G11C 16/3459 (2013.01)] 12 Claims
OG exemplary drawing
 
1. A semiconductor memory apparatus, comprising:
a NAND memory cell array; and
a controller configured to apply a programming pulse based on an incremental step pulse programming in order to program a selected page of the NAND memory cell array;
wherein the programming pulse comprises at least one sacrificial programming pulse such that a memory cell of the selected page cannot pass a program verification after being applied with the at least one sacrificial programming pulse, and the at least one sacrificial programming pulse comprises an initial programming pulse, and
wherein the at least one sacrificial programming pulse comprises a plurality of programming pulses, the programming pulse further comprises other programming pulses, and a first step voltage between the sacrificial programming pulses is less than a second step voltage between the other programming pulses,
wherein the controller is configured to determine whether the memory cells with a fixed number or all of memory cells in the selected page pass the program verification after being applied with the sacrificial programming pulse, and in a case of being qualified, the controller is configured to reduce the initial programming pulse applied in a next programming operation,
wherein the semiconductor memory apparatus further comprises a register, wherein in a case of being qualified, a flag for indicating that the initial programming pulse of the at least one sacrificial programming pulse is too high is set in the register, and the controller determines whether the flag is set in the register, when the flag is set in the register, the controller reduces the initial programming pulse.