| CPC G09G 3/32 (2013.01) [G09G 2310/0267 (2013.01); G09G 2330/021 (2013.01)] | 23 Claims |
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1. A display device comprising:
a display panel including a plurality of pixels connected to a plurality of scan lines;
a scan driving circuit, which drives the plurality of scan lines in synchronization with clock signals; and
a driving controller, which outputs the clock signals that include a first clock signal and a second clock signal,
wherein, while an operating mode is a multi-frequency mode, the driving controller comparts the display panel into a first display area and a second display area,
wherein, in the multi-frequency mode, the scan driving circuit provides scan signals of a first operating frequency to first scan lines positioned in the first display area among the plurality of scan lines, and provides scan signals of a second operating frequency lower than the first operating frequency to second scan lines positioned in the second display area among the plurality of scan lines,
wherein a hold frame of the multi-frequency mode includes a first section during which the first display area is driven, and a second section during which the second display area is driven, and
wherein the driving controller has a control signal generator that outputs the first clock signal and the second clock signal in a normal power mode during the first section and outputs the first clock signal and the second clock signal in a low-power mode during the second section.
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