| CPC H10F 10/166 (2025.01) [C23C 14/14 (2013.01); C23C 14/5806 (2013.01); H01L 21/02381 (2013.01); H01L 21/02532 (2013.01)] | 14 Claims |

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1. A process for fabricating a solar cell comprising:
depositing a layer of amorphous silicon on a substrate using physical vapour deposition;
annealing the amorphous silicon to generate a layer of polycrystalline silicon; and
after annealing, conducting another anneal at a temperature of between 300° C. and 600° C.,
wherein the substrate is a layer of a dielectric disposed on a silicon wafer, said layer of dielectric being less than 5 nm thick.
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