| CPC H10D 89/10 (2025.01) [H10D 30/43 (2025.01); H10D 30/6211 (2025.01); H10D 30/6735 (2025.01); H10D 30/6757 (2025.01); H10D 62/121 (2025.01); H10D 84/834 (2025.01)] | 20 Claims |

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1. An integrated circuit comprising:
a first function cell including at least one first pattern extending in a first direction along a first grid in a first layer and at least one second pattern extending in the first direction along a second grid in a second layer; and
a second function cell including at least one third pattern extending in the first direction along the first grid in the first layer and at least one fourth pattern extending in the first direction along the second grid in the second layer,
wherein the first function cell and the second function cell respectively correspond to a first circuit,
the first grid has a first pitch in a second direction greater than a second pitch of the second grid in the second direction, and the second direction crossing the first direction,
the second grid has a first offset from the first grid in the first function cell and has a second offset from the first grid in the second function cell, and the second offset is different from the first offset,
in the first function cell and the second function cell, the second grid comprises a grid line that has a third offset from the first grid and extends in the first direction, and
the at least one second pattern does not overlap the grid line of the second grid in the first function cell, and the at least one fourth pattern does not overlap the grid line of the second grid in the second function cell.
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