| CPC H10D 64/251 (2025.01) [H01L 21/31144 (2013.01); H10D 64/01 (2025.01); H10D 64/62 (2025.01)] | 10 Claims |
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1. A method of manufacturing a semiconductor structure, comprising:
providing a base, wherein an active region is formed on the base, and the active region comprises a source region, a gate region, and a drain region that are sequentially adjacent to each other;
forming a first contact structure on each of the source region and the drain region, and forming a second contact structure on the gate region; and
forming a third contact structure on each of the first contact structures and the second contact structure, wherein an area of a bottom surface of the first contact structure and an area of a bottom surface of the second contact structure are both larger than an area of a top surface of the third contact structure,
further comprising:
forming a contact layer on the active region, wherein the contact layer covers the source region and the drain region;
wherein the forming a contact layer on the active region comprises:
forming an initial contact layer on the active region, wherein the initial contact layer covers the source region, the gate region, and the drain region; and
removing a part of the initial contact layer on a top surface and a side wall of the gate region, wherein a remaining part of the initial contact layer forms the contact layer.
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