| CPC H10D 62/121 (2025.01) [H01L 21/02532 (2013.01); H01L 21/30604 (2013.01); H10D 30/024 (2025.01); H10D 30/62 (2025.01); H10D 30/6735 (2025.01); H10D 62/292 (2025.01); H10D 64/015 (2025.01); H10D 64/021 (2025.01); H01L 21/02271 (2013.01); H01L 21/26513 (2013.01); H01L 21/31053 (2013.01); H01L 21/76224 (2013.01); H10D 64/017 (2025.01)] | 20 Claims |

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1. A method for fabricating a semiconductor structure, comprising:
forming a first silicon layer over a substrate;
forming a first silicon germanium layer over the first silicon layer, wherein the first silicon germanium layer has a first germanium concentration;
forming a second silicon germanium layer over the first silicon germanium layer, wherein the second silicon germanium layer has a second germanium concentration greater than the first germanium concentration;
forming a third silicon germanium layer over the second silicon germanium layer, wherein the third silicon germanium layer has a third germanium concentration less than the second germanium concentration;
forming a second silicon layer over the third silicon germanium layer; and
partially removing the first silicon layer, the first silicon germanium layer, the second silicon germanium layer and the third silicon germanium layer from a lateral side by an etching operation and thereby forming a recess laterally encroaching the first silicon layer, wherein a contour of the recess has a first section proximal to the lateral side, a second section connecting to the first silicon germanium layer, and a third section between the first section and the second section, and wherein an absolute value of a derivative at the third section is greater than both an absolute value of a derivative at the first section and an absolute value of a derivative at the second section.
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