US 12,453,103 B2
Three-dimensional array device
Masaharu Kobayashi, Tokyo (JP); Toshiro Hiramoto, Tokyo (JP); and Jixuan Wu, Tokyo (JP)
Assigned to JAPAN SCIENCE AND TECHNOLOGY AGENCY, Kawaguchi (JP)
Filed by JAPAN SCIENCE AND TECHNOLOGY AGENCY, Kawaguchi (JP)
Filed on Sep. 21, 2022, as Appl. No. 17/949,385.
Application 17/949,385 is a continuation of application No. PCT/JP2021/013511, filed on Mar. 30, 2021.
Claims priority of provisional application 63/007,582, filed on Apr. 9, 2020.
Prior Publication US 2023/0014841 A1, Jan. 19, 2023
Int. Cl. H10B 61/00 (2023.01); H10B 63/00 (2023.01); H10D 30/67 (2025.01); H10N 70/00 (2023.01); H10N 70/20 (2023.01)
CPC H10B 63/84 (2023.02) [H10B 63/30 (2023.02); H10D 30/6755 (2025.01); H10N 70/24 (2023.02); H10N 70/8833 (2023.02)] 16 Claims
OG exemplary drawing
 
1. A three-dimensional array device with multiple layers in a height direction comprising:
a first two-dimensional array circuit located in a first layer; and
a second two-dimensional array circuit located in a second layer adjacent to the first layer and overlapping with the first two-dimensional array circuit in a plan view, wherein
each of the first two-dimensional array circuit and the second two-dimensional array circuit has a first wiring group, an input part for inputting a signal to the first wiring group, a second wiring group intersecting with the first wiring group in a plan view, and an output part for outputting a signal from the second wiring group, and
the output part in the first two-dimensional array circuit overlaps with the input part in the second two-dimensional array circuit in a plan view and is connected in a signal transferable manner.