US 12,453,095 B2
Semiconductor storage device
Ryota Nihei, Yokkaichi Mie (JP); and Koji Matsuo, Ama Aichi (JP)
Assigned to Kioxia Corporation, Tokyo (JP)
Filed by Kioxia Corporation, Tokyo (JP)
Filed on Mar. 3, 2023, as Appl. No. 18/178,460.
Claims priority of application No. 2022-147219 (JP), filed on Sep. 15, 2022.
Prior Publication US 2024/0098995 A1, Mar. 21, 2024
Int. Cl. H10B 43/20 (2023.01); H10B 43/10 (2023.01); H10B 43/27 (2023.01); H10B 43/35 (2023.01)
CPC H10B 43/27 (2023.02) [H10B 43/10 (2023.02); H10B 43/35 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A semiconductor storage device, comprising:
a first gate electrode layer extending in a first direction;
a second gate electrode layer extending in the first direction;
a first semiconductor layer extending in a second direction intersecting the first direction, the first semiconductor layer being between the first gate electrode layer and the second gate electrode layer in a third direction intersecting the first and second directions;
a second semiconductor layer extending in the second direction, the second semiconductor layer being between the first semiconductor layer and the second gate electrode layer in the third direction and separated from the first semiconductor layer;
a third semiconductor layer between the first gate electrode layer and the second gate electrode layer in the third direction, the third semiconductor layer extending in the second direction and being spaced from the first semiconductor layer in the first direction by a first gap;
a first charge trapping layer between the first gate electrode layer and the first semiconductor layer;
a second charge trapping layer between the second gate electrode layer and the second semiconductor layer; and
a third charge trapping layer between the first gate electrode layer and the third semiconductor layer.