US 12,453,089 B2
Memory arrays comprising strings of memory cells and methods used in forming a memory array comprising strings of memory cells
Jordan D. Greenlee, Boise, ID (US); and John D. Hopkins, Meridian, ID (US)
Filed by Lodestar Licensing Group LLC, Evanston, IL (US)
Filed on Nov. 9, 2023, as Appl. No. 18/505,563.
Application 18/505,563 is a division of application No. 17/223,359, filed on Apr. 6, 2021, granted, now 11,856,764.
Prior Publication US 2024/0081052 A1, Mar. 7, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H10B 43/00 (2023.01); H01L 21/768 (2006.01); H10B 41/27 (2023.01); H10B 43/27 (2023.01)
CPC H10B 41/27 (2023.02) [H01L 21/76802 (2013.01); H01L 21/76889 (2013.01); H10B 43/27 (2023.02)] 12 Claims
OG exemplary drawing
 
1. A memory array comprising strings of memory cells, comprising:
a conductor tier comprising conductor material;
laterally-spaced memory blocks individually comprising a vertical stack comprising alternating insulative tiers and conductive tiers directly above the conductor tier, channel-material strings of memory cells extending through the insulative tiers and the conductive tiers, conducting material of a lower of the conductive tiers directly electrically coupling together the channel material of individual of the channel-material strings and the conductor material of the conductor tier;
intervening material laterally-between and longitudinally-along immediately-laterally-adjacent of the memory blocks, the intervening material comprising insulating material; and
horizontally-elongated lines in an upper portion of the conductor tier between the laterally-spaced memory blocks, the horizontally-elongated lines being of different composition from an upper portion of the conductor material and comprising metal material.