US 12,453,080 B2
Memory device and method for fabricating the same
Kang Sik Choi, Gyeonggi-do (KR)
Assigned to SK hynix Inc., Gyeonggi-do (KR)
Filed by SK hynix Inc., Gyeonggi-do (KR)
Filed on Oct. 5, 2022, as Appl. No. 17/960,285.
Application 17/960,285 is a continuation of application No. 17/166,367, filed on Feb. 3, 2021, granted, now 11,488,962.
Claims priority of application No. 10-2020-0113117 (KR), filed on Sep. 4, 2020.
Prior Publication US 2023/0025132 A1, Jan. 26, 2023
Int. Cl. H10B 12/00 (2023.01); G11C 5/06 (2006.01)
CPC H10B 12/36 (2023.02) [G11C 5/063 (2013.01); H10B 12/03 (2023.02); H10B 12/056 (2023.02); H10B 12/482 (2023.02); H10B 12/485 (2023.02); H10B 12/488 (2023.02)] 14 Claims
OG exemplary drawing
 
1. A memory device, comprising:
a lower structure;
a peripheral circuit portion and a three-dimensional array of memory cells vertically spaced apart from each other from the peripheral circuit portion,
wherein each of the memory cells of the three-dimensional array includes:
an active layer horizontally oriented for a surface of the peripheral circuit portion;
a bit line electrically connected to a first end of the active layer and vertically oriented for the peripheral circuit portion;
a capacitor electrically connected to a second end of the active layer;
an active body vertically oriented and passing through the active layer;
a fin channel layer horizontally extending from the active body; and
a word line including a protrusion covering the fin channel layer.